Wafer Level Dynamic Reliability Test System
Highlights SPEC

For aging test of 4, 6, 8-inch SiC MOSFET wafer, temperature up to 200℃

Parallel testing for up to 6 wafers

Up to 2000 stations per layer for parallel testing, alignment accuracy ≤ 50μM

Meet AQG324 and JEP195 standards


DUT: Car-grade SiC MOSFET wafer, compatible with 4, 6, 8 inch


Temperature Range: RT - 200℃

Voltage Range: HTGB:-30V~+30V; DHTGB:±30V, 500kHz, 0~100% duty cycle adjustable, dVGS/dt up to>1V/ns; HTRB: 0V~2000V

Layers: 1~6

Test Channels per Wafer: 2000

Test Range: HTGB,DHTGB: VGS(th) (20mV~200V), IGSS (100nA~20mA); HTRB: IDSS (100nA~20mA)

Test Accuracy: VGS(th) : 0.015% + 1mV (@20V); IGSS: 0.060% + 100pA (@100nA); IDSS: 1% (@10uA)